Lamp triggering circuit

ABSTRACT

Lamp triggering circuits for use in triggering selected lamps within a plural lamp array in a high-speed fashion and having circuit connection means adapted to prevent false triggering of lamps adjacent to those selected to fire.

United States Patent [151 3,675,076

Klockenbrink et al; July 4, 1972 [54] LAMP TRIGGERING CIRCUIT 72Inventors: Joseph M. Klockenbrink, New York, N.Y.; [56] c'ted KemalAydin, Old Greenwich, Conn. UNITED STATES PATENTS 1 Assigneer Path mpEquipment Stamford, 3 049 642 8/1962 Quinn ..315/23s x Conn.

[22] Filed; June 12, 1970 Primary Examiner-John KominskiAttorney-Ostrolenk, Faber, Gerb & Soffen [21] Appl. No.: 45,607

Y [57] ABSTRACT [52] [1.8. CI. ..315/200 R,315/209, 315/210, L t i erincircuits for use in triggering selected lamps 315/227 315/231, 315/238,315/240, 315/241, within a plural lamp array in a high-speed fashion andhaving 315/325 circuit connection means adapted to prevent falsetriggering [51 1 Int. Cl. of lam adjacent to those elected to fire [58]Field ofSearch ..3l3/201; 315/209 R, 210, 227 R,

11 Claims, 2 Drawing Figures LAMP TRIGGERING CIRCUIT The presentinvention relates to triggering circuits for lamp arrays, and moreparticularly to a novel triggering circuit for triggering and firingonly selected lamps within an array and for preventing false firing ofthose lamps adjacent to the lamps which have been fired.

BACKGROUND OF THE INVENTION There exist a wide variety of applicationswherein it is desired to fire selected lamps within a lamp array, whichoperations are performed at high-speed and require accurate, positivefiring of only those lamps selected to be triggered.

One particular application of such lamp arrays in trigger circuits isset forth in copending application, Ser. No. 801,635, filed Feb. 24,1969, and assigned to the assignee of the present invention. Theabove-mentioned copending application teaches a high-speed non-impactprinter in which a lamp array which may be comprised of more than 100lamps arranged in closely spaced fashion are selectively triggered asand when certain characters provided upon the periphery of a revolvingdrum, move into a position in which the character they represent andposition on the line at which the character is to be printed is calledfor. Since the drum rotates at a relatively high-speed, accuratehigh-speed circuitry is required for controlling the flashing of thelamps.

One critical problem which has been found to occur in such devices, aswell as other devices which require selective flashing, is the falseflashing of lamps within the array which are usually positioned in closeproximity to those lamps which are flashed. Occurrences of this natureresult in a false output, thereby affecting the speed and reliability ofthe system.

BRIEF DESCRIPTION OF THE INVENTION The present invention ischaracterized by providing trigger circuitry for such lamp arrays whichis capable of providing positive high-speed triggering of such lamps andwhich further prevents the false firing of all those lamps in the arraywhich have not been selected to be triggered.

The present invention utilizes, in one preferred embodiment, an SCRcircuit rendered selectively conductive by logical circuitry to completean electrical circuit including a fully charged member and the lamp topermit rapid, positive discharge of the fully charged member through thelamp in order to provide flashing. Those lamps in the array which arenot selected for firing are provided with blocking components to preventtriggering of the SCRs which have not been triggered for firing thelamp. The circuit connections of the SCR and blocking member areselected so as to be adapted to emit an insignificant amount ofradiation when triggered and further so as to be effectively immune fromradiation resonating from adjacent connections in order to prevent falsetriggering. Thus, the actual triggering circuitry is capable ofaccurately and positively triggering only those lamps which are selectedfor triggering, while preventing false triggering of any of theremaining lamps.

OBJECT OF THE INVENTION BRIEF DESCRIPTION OF THE FIGURES This as well asother objects of the present invention will become apparent when readingthe accompanying description and drawings in which:

FIG. 1 is a schematic diagram showing one lamp array in which thetriggering circuitry of the present application may be employed.

FIG. 2 is a schematic diagram showing triggering circuits for a lamparray, which circuits are designed in accordance with the principles ofthe present invention.

DETAILED DESCRIPTION OF THE FIGURES Referring initially to FIG. 1, thereis shown therein a lamp array 10 comprised of a plurality of lamps 1l-lthrough ll-n, some of which have been eliminated for purposes ofsimplicity, it being understood that the array may be greater than 100in number. Each lamp is comprised of an anode-electrode l3-l throughl3-n and a cathode-electrode 14-] through l4-n. Although not shown inthe figure, the cathode-electrode 14 is preferably provided with abulb-shaped tip employed to enhance the gas discharge. The envelope ofthe tube may preferably be filled with xenon; however, any othersuitable ionized gas may be employed. Each of the flash lamps areconnected with a circuit for applying a voltage across the anode andcathode-electrodes. The circuit includes a high-voltage dc source (notshown) which is intermittently connectable to the anode-electrodes forsimultaneously charging all of the capacitors 16-] through 16-nconnected between the anode leads 13-] through l3-n of their associatedlamps and a common ground bus 15. All of the capacitors 16-] through16-n are fully charged by application of the voltage source. Numeral 20designates a common bus which connects all of the trigger electrodes17-1 through 17-n of each lamp in electrical series.

An SCR 12-] through 12-n is electrically connected in series with eachlamp 11-] through ll-n, whereby the anodeelectrode of each SCR isconnected to the cathode-electrode 14 of its associated lamp and wherebythe cathode-electrode of each SCR is electrically connected to groundbus 15. The trigger electrode of each SCR is connected to the outputterminal of an associated gate circuit 18-1 through 18-n, respectively.In order to cause the flashing of any one or more of the lamps withinthe array, suitable input signals are applied to the gate circuits 18-lthrough l8-n to render their associated SCRs conductive. Thehigh-voltage d-c source is decoupled from the anode-electrode of all ofthe lamps and the common bus 20 simultaneously applies a trigger pulsesignal to the trigger electrodes 17-1 through 17-n of all of the lamps11-1 through ll-n, respectively. The trigger pulse enables all of thelamps to be discharged; however, only those lamps whose SCRs have beenenabled will establish a closed loop current path with the SCR, thecapacitor and the lamps to permit the capacitor to discharge through thelamp.

One advantageous application of such a lamp array is set forth in detailin the above-mentioned copending application, Ser. No. 801,635. Thebasic function of the high-speed triggering circuit is to cause selectedones of the lamps to fire as and when predetermined characters providedon the revolving drum are in registry with an associated lamp so as tocause the desired image to be projected upon a light-sensitive surfacefor ultimate printing of a character, or other image.

In the high-speed, non-impact printer described in the above-mentionedcopending US. application, the lamps in the array are arranged at veryclosely spaced intervals such that their connecting terminals as well asthe connecting terminals of associated components for each lamp, arealso quite closely spaced. It has been found that the triggeringoperation in conventional devices causes selected leads of the triggercircuit components to generate either a magnetic or an electromagneticfield which is omnidirectional so as to activate a similar lead of anadjacent component through inductive coupling to cause the false firingof one or more lamps which were not intended to be fired at that giveninstant. It therefore becomes necessary to provide a triggering circuitwhich permits highspeed operation of the lamp array and yet preventsfalse triggering of all remaining lamps within the array which have notbeen selected for illumination at that given instant.

FIG. 2 shows a triggering circuit designed in accordance with theprinciples of the present invention which has been found to be highlyeffective in providing for positive highspeed triggering of lamps withinthe array, while at the same time preventing false triggering of allremaining ,lamps within the array which have not been selected forillumination. The

circuit 20 of FIG. 2 shows one of the arrayof gate circuits 18,

in order to generate a signal at its output terminal 22 when all.

three inputs (for example) are simultaneously in the binary ONE state.Terminal 23 of the gate circuit is coupled to a common bus 24 forproviding the d-c level.

Output terminal 22 of the gate circuit is coupled to the base electrodeof transistor T through resistor R The emitter electrode of transistor Tis coupled to bus 24, while the collector electrode is coupled throughdiode D and resistor R to a minus d-c bias supply which is coupled toterminal 25. Terminal 25 is further coupled to ground potential 26through capacitor C,. In a like manner, the bus 24 is coupled to groundpotential 26 through capacitor C A capacitor C is coupled in parallelacross resistor R The common terminal 30 connecting R C;,, R, and D, iscoupled through resistor R to the trigger electrode 27 of SCR 12-1.,

SCR 12-1 is coupled in series with lamp 11-1 in the same manner as waspreviously described with respect to FIG. 1. Likewise, capacitor 16-1 isconnected in parallel across the series connected elements 11-1 and12-1, the lower terminal of capacitor 16-1 being coupled to groundpotential 26. The lead 29 extending from the cathode-electrode of SCR12-1 is coupled to a common bus 28 which is also at ground potential.The lead extending from the trigger electrode of SCR 12-1 is coupled incommon to one terminal of R and capacitor C whose opposite terminal iscoupled to ground bus 28. It should be understood that a similar triggercircuit is provided for each individual lamp within the array whereineach trigger circuit is substantially identical in design and operationto that shown in FIG. 2.

In one practical embodiment, thebias level applied to terminal 25 isminus 4 volts. The bias level connected to bus 24 at terminal 29 is ofthe order of plus 5.6 volts.

The'voltage level at the output 22 of gate circuit 18-1 varies betweenand volts, respectively, wherein the output level is normally at 5 voltsand is abruptly changed to 0 volts when it is desired to illuminate thelamp associated with gate 18-1. in this instance, an input signal isapplied to input terminal 21, causing the output level at terminal 22 togo abruptly to 0 volts, thereby causing transistor T to be conductive.The conduction of transistor T causes current to flow through resistor Rwhich develops an IR drop to raise common terminal 30 to a level of theorder of plus 5 volts, which has been found to be sufiicient to triggerSCR 12-1 into conduction.

Under normal circumstances, i.e., prior to the triggering of SCR 12-1,terminal 30 is maintained at a level of the order of minus 4 volts whichis sufficient to maintain the SCR in its non-conductive state. In thisstate, capacitor C is charged so that the level across its tenninals isalso of the order of 4 volts. In order to perform a positive andaccurate triggering operation, the voltage level at lead 27 must becapable of changing from minus 4 volts to plus 5 volts in the order of0.75 to 1.25 microseconds. Conversely, immediately after a triggeringoperation, capacitor C must be capable of becoming fully charged withina period ranging from 20 to 500 microseconds. It has been found that thecharging rate of capacitor C falls well within this range.

In order to prevent any SCR 12 within the array. 12-1 through 12-n frombeing falsely triggered, it is important that a negative'bias of asufiicient level be applied to the trigger electrode. Capacitor C servesthis function since it is capable of being fully charged to thenecessary negative bias level by way of the bias supply coupled toterminal 25 as soon as transistor T is rendered non-conductive. The avoltage gate circuit with a positive developed across capacitor C., hasbeen found to be sufiicient to block out transients but is insufficientto block out the firing pulse. Diode D protects transistor T and thelogic gate 18-1 in case-a short'circuit develops across lamp 11-1.

Another significant characteristic of the trigger circuit 20 shown inFIG. 2 is the use of discrete components 12-1 and C whose leads areadapted to be effectively incapable of emitting significant radiationand, alternatively, beingeffectively insensitive to radiation emittedfrom the discrete components of adjacenttriggering circuits. Groundedbus 28 may be considered to represent a conductive coating provided upona printed circuit board and whichis adaptable to have mounted thereon aplurality of discrete components such as, for example, SCR 12-1,capacitor C transistor T, and so forth. The nature of the printedcircuit boards utilized in such lamp arrays and as dictated by thecompact closely spaced arrangement of the lamps in lamp array 11-1through 11-n, necessitates a similar closely spaced arrangement for thecomponents such as 12-1 and C, for each lamp 11 within the array. Forexample, a single printed circuit board may have mounted thereon thediscrete components for as many as twenty triggering circuits. Thelength of the leads for discrete components 12-] and C, have been foundto be extremely critical. For example, the rate of change of currentthrough capacitor C and the SCR cathode lead 29 is so rapid as to causethese elements to radiate. The omnidirectional radiation, inconventional circuits, has been found to influence the leads of likecomponents provided in the neighboring triggering circuits forassociated lamps which can influence the blocking capacitor C and SCRl2-i so as to cause false triggering of a lamp which is otherwise notintended to be illuminated. For this reason, it is important to selectthe length of the leads for capacitor C and the lead 29 of SCR 12-] sothat they will emit insignificant radiation and so that they converselywill be substantially insensitive to radiation emitted from likecomponents of neighboring triggering circuits. This coupling may bereferred to as the antenna effect. The magnetic filed generated by aconductor is known to be directly proportional to its length andinversely proportional to the square of the distance between theconductor and the point at which the magnetic field is being measured.Since the spacing between leads of neighboring components is limited asa result of the high packaging density of the printed circuit board, themagnetic field generated by the leads can be appreciably reduced byshortening the length of the leads.

in one practical circuit design, it has been found that the lead lengthbetween the upper terminal of capacitor C and lead 27, the lead lengthofthe lead between capacitor C and ground bus 28 and the lead length oflead 29 between the cathode-electrode of SCR 12-1 and ground bus 28 wasof the order of one-fourth inch. These lead lengths, coupled with theprovision of blocking capacitor C, were found to be extremely effectivein preventing false triggering of lamps within the array. As a practicalmatter, the lead lengths, if made too short, are extremely difficult tohandle in the case where the discrete components are being mounted uponand soldered to the printed circuit board. The lead lengths can begreater than one-fourth inch and preferably should be made no greaterthan 1 inch in length in order to reduce the antenna effect. The leadlength, can be less than one-fourthinch and may be as small asone-eighth in'ch. Exhaustive experimentation of lamp arrays of the typedescribed herein have shown that no false triggering will occur whenutilizing the trigger circuit and design parameters describedhereinabove.

It can be seen from the foregoing description that the present inventionprovides a novel triggering circuit for use in triggering only selectedlamps within a lamp array wherein the triggering can be-performed in afast, positive manner and wherein those remaining lamps which are not tobe triggered are prevented from false firing in accordance with thetriggering circuit employed and the design parameters of certaincritical components provided therein.

Although this invention has been described with respect to its preferredembodiments, it should be understood that many variations andmodifications will now be obvious to those skilled in the art, and it ispreferred, therefore, that the scope of the invention be limited not bythe specific disclosure herein, but only by the appended claims.

1. Means for closing a normally open electrical circuit comprisingnonnally open switch means having first and second terminals in saidelectrical circuit and further including a control terminal for closingsaid switch means;

bias means;

energy storing means coupled to said control terminal and said biasmeans and adapted to develope a bias level for normally maintaining saidswitch means in the open state;

means for charging said energy storing means to said bias level;

second switch means coupled to said control terrnain and said energystoring means and having an input terminal for receiving an inputtrigger signal to apply a trigger level output signal to said controlterminal for rapidly overcoming said bias level and closing said switchmeans;

said energy storing means being adapted to be rapidly recharged to saidbias level when said input trigger signal is removed.

2. Means for closing a normally open electrical circuit which includes asilicon controlled rectifier having anode and cathode electrodesconnected in said electrical circuit and having a trigger electrode forrending said silicon controlled rectifier conductivel a first capacitorbieng connected between said trigger electrode and one of said cathodeand anode electrodes;

a first constant bias source connected to said trigger electrode forcharging said capacitor to a bias level sufficient to normally maintainsaid silicon controlled rectifier in the non-conductive state;

transistor means having an input terminal for receiving a first inputpulse signal and an output terminal connected to said trigger electrodefor rapidly overcoming said bias level and triggering said siliconcontrolled rectifier into the conductive state in the presence of saidinput pulse signal;

said capacitor being adapted to be rapidly recharged to said bias levelwhen said trigger pulse signal is terminated.

3. The circuit of claim 2 wherein said first capacitor is provided withconductive leads for connecting the first capacitor into the electricalcircuit;

said silicon controlled rectifier having conductive leads for connectingthe electrodes of said silicon controlled rectifier into the electricalcircuit;

the conductive leads of said first capacitor and the lead of said one ofsaid cathode and anode electrodes being of a length in the range fromone-eighth to 1 inch to prevent said circuit from being falselyactivated in the presence of 7 electrical radiation which may be presentin the region of said capacitor and silicon controlled rectifier leads.

4. The circuit of claim 3 being further comprised of a flash lamp havingfirst and second electrodes and a trigger electrode, said first andsecond electrodes being connected in said electrical circuit so thatsaid silicon controlled rectifier and said lamp are in electricalseries;

said lamp trigger electrode being adapted to receive a second triggerinput pulse for enabling said lamp;

a second capacitor connected in parallel across said series connectedsilicon controlled rectifier and first capacitor;

second bias means for charging said second capacitor;

said second capacitor being adapted to be discharged through saidsilicon controlled rectifier and said lamp when said first and secondtrigger input pulses are simultaneously present.

5. A trigger circuit for rapidly energizing selected lamps within anarray wherein said array is comprised of a plurality of lamps arrangedin a closely spaced manner each lamp having first, second and controlelectrodes; 7

a silicon controlled rectifier for each lamp, each of said siliconcontrolled rectifiers having cathode, anode and trigger electrodes;

a first capacitor for each lamp, each first capacitor being connectedacross the first electrode of its associated lamp and ground potential;

the second electrode of each lamp being connected to the anode electrodeof its associated silicon controlled rectifier;

said silicon controlled rectifiers being arranged at closely spacedintervals;

an elongated conductive member maintained at zero potential;

each silicon controlled rectifier having a conductive lead forconnecting its cathode electrode to said conductive member, all of saidleads being arranged at closely spaced intervals;

second capacitor for each lamp, each of said second capacitors havingconductive leads for connecting said second capacitors between thetrigger electrode of their associated silicon controlled rectifiers andsaid conductive member;

said second capacitors being arranged in a closely spaced fashion;

first bias means for simultaneously charging all of said firstcapacitors to a first predetermined voltage level;

second bias means for simultaneously charging all of said secondcapacitors to a second predetermined voltage level sufficient tomaintain their associated silicon controlled rectifiers in thenon-conductive state;

transistor means for each lamp, each of said transistor means having aninput terminal for receiving a first trigger pulse and an outputterminal connected to the trigger electrode of its associated siliconcontrolled rectifier to overcome the bias level of its associated secondcapacitor and thereby drive its associated silicon controlled rectifierinto conduction;

means for connecting the control electrodes of all of said lamps incommon and including means to receive a second trigger pulse forenabling all of said lamps to ignite whereby only those lamps whoseassociated silicon controlled rectifiers are triggered into conductionwill be ignited.

6. The trigger means of claim 5 wherein the length of said secondcapacitor leads is within the range of from one-eighth to 1.0 inch to beinsensitive to radiated energy developed by similar leads of adjacentelements which radiate energy when their transistor input terminalsreceive a first trigger pulse so as to prevent improper triggering oflamps which are not selected for ignition.

7. The trigger means of claim 5 wherein the length of said siliconcontrolled rectifier cathode lead is within the range of from one-eighthto 1.0 inch to be insensitive to radiated energy developed by similarleads of adjacent elements which radiate energy when their transistorinput terminals receive a first trigger pulse so as to prevent impropertriggering of lamps which are not selected for ignition.

8. The trigger circuit of claim 5 wherein each of said transistor meansis comprised of a transistor having emitter, collector and baseelectrodes;

each of said base electrodes being connected to said transistor meansinput terminal;

each of said collector electrodes being connected to said transistormeans output terminal.

9. The trigger circuit of claim 8 wherein each of said transistor meansis provided with a third electrode means for connecting all of saidthird electrodes in common;

third bias means connected to said common connection means;

parallel connected resistor means and third capacitor me ans beingconnected between the output of each transistor and said second biasmeans.

10. The trigger circuit of claim 9 further comprising second resistormeans connected between each diode electrode and the trigger electrodeof its associated silicon controlled rectifier.

1 l. The trigger circuit of claim 10 further comprising diode meansconnected between the third electrode of each 5- transistor and oneterminal of its associated parallel connected first resistor and thirdcapacitor.

1. Means for closing a normally open electrical circuit comprisingnormally open switch means having first and second terminals in saidelectrical circuit and further including a control terminal for closingsaid switch means; bias means; energy storing means coupled to saidcontrol terminal and said bias means and adapted to develope a biaslevel for normally maintaining said switch means in the open state;means for charging said energy storing means to said bias level; secondswitch means coupled to said control termain and said energy storingmeans and having an input terminal for receiving an input trigger signalto apply a trigger level output signal to said control terminal forrapidly overcoming said bias level and closing said switch means; saidenergy storing means being adapted to be rapidly recharged to said biaslevel when said input trigger signal is removed.
 2. Means for closing anormally open electrical circuit which includes a silicon controlledrectifier having anode and cathode electrodes connected in saidelectrical circuit and having a trigger electrode for rending saidsilicon controlled rectifier conductivel a first capacitor biengconnected between said trigger electrode and one of said cathode andanode electrodes; a first constant bias source connected to said triggerelectrode for charging said capacitor to a bias level sufficient tonormally maintain said silicon controlled rectifier in thenon-conductive state; transistor means having an input terminal forreceiving a first input pulse signal and an output terminal connected tosaid trigger electrode for rapidly overcoming said bias level andtriggering said silicon controlled rectIfier into the conductive statein the presence of said input pulse signal; said capacitor being adaptedto be rapidly recharged to said bias level when said trigger pulsesignal is terminated.
 3. The circuit of claim 2 wherein said firstcapacitor is provided with conductive leads for connecting the firstcapacitor into the electrical circuit; said silicon controlled rectifierhaving conductive leads for connecting the electrodes of said siliconcontrolled rectifier into the electrical circuit; the conductive leadsof said first capacitor and the lead of said one of said cathode andanode electrodes being of a length in the range from one-eighth to 1inch to prevent said circuit from being falsely activated in thepresence of electrical radiation which may be present in the region ofsaid capacitor and silicon controlled rectifier leads.
 4. The circuit ofclaim 3 being further comprised of a flash lamp having first and secondelectrodes and a trigger electrode, said first and second electrodesbeing connected in said electrical circuit so that said siliconcontrolled rectifier and said lamp are in electrical series; said lamptrigger electrode being adapted to receive a second trigger input pulsefor enabling said lamp; a second capacitor connected in parallel acrosssaid series connected silicon controlled rectifier and first capacitor;second bias means for charging said second capacitor; said secondcapacitor being adapted to be discharged through said silicon controlledrectifier and said lamp when said first and second trigger input pulsesare simultaneously present.
 5. A trigger circuit for rapidly energizingselected lamps within an array wherein said array is comprised of aplurality of lamps arranged in a closely spaced manner each lamp havingfirst, second and control electrodes; a silicon controlled rectifier foreach lamp, each of said silicon controlled rectifiers having cathode,anode and trigger electrodes; a first capacitor for each lamp, eachfirst capacitor being connected across the first electrode of itsassociated lamp and ground potential; the second electrode of each lampbeing connected to the anode electrode of its associated siliconcontrolled rectifier; said silicon controlled rectifiers being arrangedat closely spaced intervals; an elongated conductive member maintainedat zero potential; each silicon controlled rectifier having a conductivelead for connecting its cathode electrode to said conductive member, allof said leads being arranged at closely spaced intervals; a secondcapacitor for each lamp, each of said second capacitors havingconductive leads for connecting said second capacitors between thetrigger electrode of their associated silicon controlled rectifiers andsaid conductive member; said second capacitors being arranged in aclosely spaced fashion; first bias means for simultaneously charging allof said first capacitors to a first predetermined voltage level; secondbias means for simultaneously charging all of said second capacitors toa second predetermined voltage level sufficient to maintain theirassociated silicon controlled rectifiers in the non-conductive state;transistor means for each lamp, each of said transistor means having aninput terminal for receiving a first trigger pulse and an outputterminal connected to the trigger electrode of its associated siliconcontrolled rectifier to overcome the bias level of its associated secondcapacitor and thereby drive its associated silicon controlled rectifierinto conduction; means for connecting the control electrodes of all ofsaid lamps in common and including means to receive a second triggerpulse for enabling all of said lamps to ignite whereby only those lampswhose associated silicon controlled rectifiers are triggered intoconduction will be ignited.
 6. The trigger means of claim 5 wherein thelength of said second capacitor leads is within the range Of fromone-eighth to 1.0 inch to be insensitive to radiated energy developed bysimilar leads of adjacent elements which radiate energy when theirtransistor input terminals receive a first trigger pulse so as toprevent improper triggering of lamps which are not selected forignition.
 7. The trigger means of claim 5 wherein the length of saidsilicon controlled rectifier cathode lead is within the range of fromone-eighth to 1.0 inch to be insensitive to radiated energy developed bysimilar leads of adjacent elements which radiate energy when theirtransistor input terminals receive a first trigger pulse so as toprevent improper triggering of lamps which are not selected forignition.
 8. The trigger circuit of claim 5 wherein each of saidtransistor means is comprised of a transistor having emitter, collectorand base electrodes; each of said base electrodes being connected tosaid transistor means input terminal; each of said collector electrodesbeing connected to said transistor means output terminal.
 9. The triggercircuit of claim 8 wherein each of said transistor means is providedwith a third electrode means for connecting all of said third electrodesin common; third bias means connected to said common connection means;parallel connected resistor means and third capacitor means beingconnected between the output of each transistor and said second biasmeans.
 10. The trigger circuit of claim 9 further comprising secondresistor means connected between each diode electrode and the triggerelectrode of its associated silicon controlled rectifier.
 11. Thetrigger circuit of claim 10 further comprising diode means connectedbetween the third electrode of each transistor and one terminal of itsassociated parallel connected first resistor and third capacitor.